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Capacity: 1Gb to 4Gb |
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Latency: as little as 7ns |
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Maximum clock rate: 800MHz |
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Minimum Timing: tRCD=2, tCYC=6, tPCR=4, tCL=2 |
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8 ports x 128 bits each direction |
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Programmable burst length: 4 or 8 |
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DDR 1600MT Max |
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Sustainable 50 GB/sec in closed page mode with BL=4 |
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200GB/s peak bandwidth |
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Multiplexed address |
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Max Cio 0.25pf |
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Max Cclk 0.8pf |
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Unidirectional data flow between memory and host |
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1.4V to 1.7V I/O, 1.4V to 1.7V Core |
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Max core current 1.3A, Nom 800mA |
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Internally ECC protected by Bit Armor™ |
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JTAG configuration/test/status port |
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“Mailbox” interface for configuration & testing |
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115ºC full function operating temperature |
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Memory to Host I/O, Vdd, Vss interconnect organized in 64 x 10 contact block per port (8
contact blocks per part) |
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Inter-die contacts: 10um pads on 25um center |
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21.8 x 12.3 mm die footprint |
The Tezzaron Octopus™ is designed to bring an entirely new level of performance to next generation processing devices.
Designed for intimate integration using die-to-die or die-to-wafer bonding technologies, the Octopus can significantly boost
overall system throughput.
The Octopus provides superior L3 caching with unprecedented density and reliability; it can deliver up to a sustained 50
gigabytes per second from 8 independent 128 bit data ports on a double pumped data bus. Data burst length can be programmed to
4 or 8 words; bursts of 8 can be interrupted with no bus penalty.
The Octopus contains an on-board ECC system called Bit Armor™ that provides ECC protected data for extended error-free
operation. Bit Armor requires no host device alterations or data insertion paths, thus providing a simple and highly usable
method for yield enhancement.
Interface adaptation is made simple by mimicking the industry standard DDR DRAM interfaces. A wide variety of I/O and
addressing options is available with either soft configuration or factory antifuse programming.
The I/O is designed for 1pf loads at a maximum data rate of one giga-transfer per second.
