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3D FPGA Demo/Test

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This circuit design contains a simple FPGA. It is designed to be stacked in identical layers, allowing tests of the interconnect in a 3D FPGA. FPGACircuit.gif (67286 bytes)
Here is one circuit layer, fabricated in a 180-nm process. Two-layer parts were built and tested (photos not available). Nodes.gif (95233 bytes)
 
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